As telecommunication devices and personal digital assistants increase in popularity so do their demand for new and interesting features. Such features, which may include digital video communication or imbedded image capture apparatus, will require the use of a transducer with specifications compatible with the devices in question i.e. low power consumption, reduced size, high resolution, high speed.
Charged coupled devices (CCD) of the type disclosed in U.S. Pat. No. 3,715,485 that issued to Weimer on Feb. 6, 1973, are presently the most significant commercial IC transducer used to represent an image as an electrical signal. Complementary Metal Oxide Semiconductor Field Effect Transistor (CMOS) image sensors and CCD sensors were developed around the same time, however it was found when they were initially created, that CMOS image sensors had too poor a signal to noise ratio to be competitive. An elementary example of a CMOS imager is described in U.S. Pat. No. 4,155,094 which issued to Ohba et al on May 15, 1979.
However, the CMOS sensor does have certain advantages over the CCD sensor. The CMOS image sensor has the ability to integrate companion circuitry such as digital signal processing circuitry onto the same substrate as the image sensor, allowing the reduction in size of the amount of peripheral circuitry needed to interface with the image sensor. Further, integrating processing and acquisition circuitry allows designers to take advantage of a wider data-path between these stages.
As well, CMOS image sensors can be manufactured using current standard CMOS fabrication techniques, giving it a significant cost advantage over using the alternative CCD image sensor which requires special manufacturing techniques. CMOS is a less expensive technology employing fewer mask layers and is a more mature fabrication technology with greater commercial volume. CCD technology complexity causes lower fabrication yield.
The noise disadvantage of CMOS imagers has been addressed at various stages in the device; in particular there was the development of correlated double sampling (CDS), which is described in U.S. Pat. No. 3,949,162 that issued to Malueg on Apr. 6, 1976.
CDS is used when reading out information from the image pixels. This operation is performed by first reading out the level of the charge stored on the pixel element and storing it on a capacitor, and then by reading out the charge stored on the pixel element by a reset voltage and storing it on a capacitor. These two signals are then combined to form a noise-reduced signal representative of the pixel signal. This process reduces most of the noise associated with an active pixel sensor (APS), such as dark current noise, kT/C noise from the floating diffusion node, the fixed pattern noise (FPN) from the MOS transistor threshold voltage differences inside the pixel, and the low-frequency noise generated by the source-follower MOS transistors. However, this process does not reduce the column-wise FPN contributed by capacitor mismatching in the column readout circuitry.
Therefore, there is a need for a process and apparatus that effectively eliminates the fixed pattern noise contributed by the column readout circuitry.